The latest PCIe 6.0 draft version 0.71 is released, the bandwidth is doubled, and the new PAM4 modulation technology is adopted

PCI Express, abbreviated as PCI-E, or PCIe, is an important branch of the computer bus. At present, this standard is formulated and maintained by the PCI Special Interest Group (PCI-SIG). Its 1.0 version was launched in 2003, and thereafter it will be updated every three or four years. So far, it has been updated to PCIe 6.0.

On July 2, PCI-SIG announced the latest version 0.71 of the latest PCIe 6.0 draft. Compared with PCIe 5.0, PCIe 6.0 has once again doubled the transmission rate and includes all-new protocols and electrical updates since the 0.7 version was approved. Version 0.7 before this version was released in November 2020. Since then, PCI-SIG has been collecting feedback from members and preparing to update version 0.71.

According to the information on the official website, the new 0.71 version is collecting feedback from members, and the review period is one month, which is to be finalized on August 2. After the 0.71 version passes the review, PCI-SIG will continue to promote the 0.9 version draft. After the draft is released, a two-month full review is required. After all of it is passed, it will usher in the 1.0 official version of PCIe 6.0. If everything is normal, the official release date should be the end of this year.

According to the information published by PCI-SIG, the main features of the PCIe 6.0 specification are:

First of all, the bandwidth of PCIe 6.0 is doubled again, from 32GT/s of PCIe 5.0 to 64GT/s; in practical applications, the actual unidirectional bandwidth of PCIe 6.0 x1 is 8GB/s, and the unidirectional bandwidth of PCIe 6.0 x16 is 128GB/ s, two-way bandwidth 256GB/s.

The second is that PCIe 6.0 will continue the 128b/130b encoding method introduced in the PCIe 3.0 era (that is, there are only 128 valid data per 130 bits), but the new pulse amplitude modulation PAM4 will be added to replace PCIe 5.0 NRZ, which can be used in a single channel and the same Pack more data in time.

Third, PCIe 6.0 can be compatible with all previous versions of PCIe architecture.

The fourth is to introduce low-delay forward error correction (FEC) and related mechanisms to improve bandwidth efficiency and reliability.

The fifth is to support FLIT mode.

Although the official specification of PCIe 6.0 is about to be released, PCIe 3.0 is currently the main application on the market. PCIe 4.0 hardware products that have been released in 2017 are still rare in the market.

Among the three core chip manufacturers, only AMD is the fastest. Its processors and graphics cards have fully supported PCIe 4.0; NVIDIA’s Ampere architecture A100 chips have begun to support PCIe 4.0, and new RTX gaming graphics cards also support PCIe 4.0; Although Intel has repeatedly emphasized that PCIe 4.0 is useless for games, its 11th-generation processors have begun to support PCIe 4.0.

It can be seen that there will be more and more PCIe 4.0 hardware products this year, and PCIe 3.0, which has persisted for almost 10 years, is finally beginning to gradually withdraw from the stage of history.

The improvement of PCIe specification has benefited many hardware products. The most immediate beneficiary is the graphics card. In the future, a large number of high-speed SSDs based on the PCIe interface will also completely release performance.

Perhaps in the consumer market, PCIe 3.0 bandwidth is sufficient, but in enterprise-level and data center-level applications, larger bandwidth and faster speeds are required. Especially in the fields that require ultra-high bandwidth such as cloud, artificial intelligence, machine learning, and edge computing in the future, PCIe 6.0 can reflect its value, because a single PCIe 6.0×16 can support 800G Ethernet.

Of course, PCIe 6.0 hardware will certainly not appear so quickly, and it is estimated that related products will not be seen on the market until at least 2023.